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Features for the ADAU1452: |
通过汽车应用认证 Certified for automotive applications |
完全可编程音频DSP,可改善声音处理性能 Fully programmable audio DSP for improved sound processing performance |
可利用专有图形编程工具SigmaStudio开发自定义信号流程 Custom signal flow can be developed using SigmaStudio, a proprietary graphical programming tool |
最高294.912
MHz、32位SigmaDSP内核(1.2 V) Max 294.912 MHz, 32-bit SigmaDSP kernel (1.2V) |
48
kHz时每样本最多6144个SIMD指令 Up to 6144 SIMD instructions per sample at 48 kHz |
高达40 k字参数/数据RAM Up to 40 k words of parameter/data RAM |
48 kHz时数字音频延迟池最高800
ms The maximum digital audio delay pool at 48 kHz is 800 ms |
音频输入/输出和路由 Audio input/output and routing |
4个串行输入端口,4个串行输出端口 Four serial input ports, four serial output ports |
48通道、32位数字输入/输出,采样速率高达192 kHz 48-channel, 32-bit digital input/output, sampling rate up to 192 kHz |
用于TDM、I2S、左对齐和右对齐格式、以及PCM的灵活配置 Flexible configuration for TDM, I2S, left - and right-aligned formats, and PCM |
多达8个立体声ASRC,比率范围从1:8到7.75:1和139 dB DNR Up to 8 stereo ASRCs with ratios ranging from 1:8 to 7.75:1 and 139 dB DNR |
立体声S/PDIF输入和输出 Stereo S/PDIF input and output |
四个PDM麦克风输入通道 Four PDM microphone input channels |
多通道、字节可寻址、TDM串行端口 Multichannel, byte-addressable, TDM serial port |
时钟振荡器可从晶振产生主时钟 The clock oscillator generates the master clock from the crystal oscillator |
整数PLL和灵活的时钟发生器 Integer PLL and flexible clock generator |
集成裸片温度传感器 Integrated bare chip temperature sensor |